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 Low Cost, Precision JFET Input Operational Amplifiers ADA4000-1/ADA4000-2/ADA4000-4
FEATURES
High slew rate: 20 V/s Fast settling time Low offset voltage: 1.70 mV maximum Bias current: 40 pA maximum 4 V to 18 V operation Low voltage noise: 16 nV/Hz Unity gain stable Common-mode voltage includes +VS Wide bandwidth: 5 MHz
PIN CONFIGURATIONS
OUT 1 V- 2 +IN 3
ADA4000-1
TOP VIEW (Not to Scale)
5
V+
4
-IN
Figure 1. 5-Lead TSOT (UJ-5)
NC 1 -IN 2 +IN 3 V- 4
8
NC V+ OUT
05791-002
ADA4000-1
TOP VIEW (Not to Scale)
7 6 5
NC
APPLICATIONS
Reference gain/buffers Level shift/driving Active filters Power line monitoring/control Current/voltage sense or monitoring Data acquisition Sample-and-hold circuits Integrators
NC = NO CONNECT
Figure 2. 8-Lead SOIC (R-8)
OUT A 1 -IN A 2 +IN A 3 -V 4
8
+V OUT B +IN B
05791-027
05791-030
05791-029
ADA4000-2
TOP VIEW (Not to Scale)
7 6 5
-IN B
Figure 3. 8-Lead SOIC (R-8)
OUT A 1 -IN A 2
8
+V OUT B +IN B
05791-028
ADA4000-2
TOP VIEW (Not to Scale)
7 6 5
GENERAL DESCRIPTION
The ADA4000-1/ADA4000-2/ADA4000-4 are JFET input operational amplifiers featuring precision, very low bias current, and low power. Combining high input impedance, low input bias current, wide bandwidth, fast slew rate, and fast settling time, the ADA4000-1/ADA4000-2/ADA4000-4 are ideal amplifiers for driving analog-to-digital inputs and buffering digital-to-analog converter outputs. The input common-mode voltage includes the positive power supply, which makes the part an excellent choice for high-side signal conditioning. Additional applications for the ADA4000-1/ADA4000-2/ ADA4000-4 include electronic instruments, ATE amplification, buffering, integrator circuits, instrumentation-quality photodiode amplification, and fast precision filters (including PLL filters). The parts also include utility functions, such as reference buffering, level shifting, control I/O interface, power supply control, and monitoring functions.
+IN A 3 -V 4
-IN B
Figure 4. 8-Lead MSOP (RM-8)
OUT A 1 -IN A 2 +IN A 3 +V 4 +IN B 5 -IN B 6 OUT B 7
14 OUT D 13 -IN D
ADA4000-4
TOP VIEW (Not to Scale)
12 +IN D 11 -V 10 +IN C 9 8
-IN C OUT C
Figure 5. 14-Lead SOIC (R-14)
OUT A 1 -IN A 2 +IN A 3 +V 4 +IN B 5 -IN B 6 OUT B 7
14 OUT D 13 -IN D
ADA4000-4
TOP VIEW (Not to Scale)
12 +IN D 11 -V 10 +IN C 9 8
-IN C OUT C
Figure 6. 14-Lead TSSOP (RU-14)
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2007 Analog Devices, Inc. All rights reserved.
05791-001
ADA4000-1/ADA4000-2/ADA4000-4 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Pin Configurations ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics............................................................. 3 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 Power Sequencing .........................................................................5 ESD Caution...................................................................................5 Typical Performance Characteristics ..............................................6 Applications..................................................................................... 10 Output Phase Reversal and Input Noise ................................. 10 Capacitive Load Drive ............................................................... 10 Settling Time............................................................................... 11 Outline Dimensions ....................................................................... 12 Ordering Guide .......................................................................... 14
REVISION HISTORY
5/07--Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADA4000-1/ADA4000-2/ADA4000-4 SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VS = 15.0 V, VCM = VS/2 V, TA = 25C, unless otherwise specified. Table 1.
Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Symbol VOS -40C TA +125C IB -40C TA +85C -40C TA +125C Input Offset Current IOS -40C TA +85C -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio Open-Loop Gain Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density INPUT IMPEDANCE Differential Mode Common Mode IVR CMRR AVO VOS/T VOH VOL ISC PSRR ISY VS = 4.0 V to 18.0 V -40C TA +125C SR GBP M en p-p en in (R||C)IN-DIFF (R||C)INCM VI = 10 V, RL = 2 k 20 5 60 1 16 0.01 10||4 103||5.5 82 -11 V VCM +15 V -40C TA +125C RL = 2 k, VO = 10 V -40C TA +125C RL = 2 k to ground -40C TA +125C RL = 2 k to ground -40C TA +125C -11 80 100 100 100 110 2 13.90 -13.4 28 92 1.35 -13.0 -12.80 2 5 Conditions Min Typ 0.2 Max 1.70 3.0 40 170 4.5 40 80 500 +15 Unit mV mV pA pA nA pA pA pA V dB dB dB V/C V V V V mA dB mA mA V/s MHz Degrees V p-p nV/Hz pA/Hz G||pF G||pF
13.60 13.40
1.65 1.80
0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz
Rev. 0 | Page 3 of 16
ADA4000-1/ADA4000-2/ADA4000-4
VS = 5 V, VCM = VS/2 V, TA = 25C, unless otherwise specified. Table 2.
Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Symbol VOS -40C TA +125C IB -40C TA +85C -40C TA +125C Input Offset Current IOS -40C TA +85C -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio Open-Loop Gain Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current POWER SUPPLY Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density INPUT IMPEDANCE Differential Mode Common Mode IVR CMRR AVO VOS/T VOH VOL ISC ISY -40C TA +125C SR GBP M en p-p en in (R||C)IN-DIFF (R||C)INCM VI = 10 V, RL = 2 k 20 5 55 1 16 0.01 10||4 103||5.5 -1.5 V VCM +3.5 V -40C TA +125C RL = 2 k, VO = 2.5 V -40C TA +125C RL = 2 k to ground -40C TA +125C RL = 2 k to ground -40C TA +125C -1.5 72 106 80 80 114 2 4.20 -3.45 28 1.25 1.65 1.80 -3.20 -3.00 2 5 Conditions Min Typ 0.20 Max 1.70 3.0 40 170 3 40 80 500 +5.0 Unit mV mV pA pA nA pA pA pA V dB dB dB V/C V V V V mA mA mA V/s MHz Degrees V p-p nV/Hz pA/Hz G||pF G||pF
4.0 3.80
0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz
Rev. 0 | Page 4 of 16
ADA4000-1/ADA4000-2/ADA4000-4 ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Supply Voltage Input Voltage Differential Input Voltage Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 10 sec) Rating 18 V V supply V supply Indefinite -65C to +150C -40C to +125C -65C to +150C 300C
THERMAL RESISTANCE
JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4. Thermal Resistance
Package Type 5-Lead TSOT (UJ-5) 8-Lead SOIC (R-8) 8-Lead MSOP (RM-8) 14-Lead SOIC (R-14) 14-Lead TSSOP (RU-14) JA 172.92 112.38 141.9 88.2 114 JC 61.76 61.6 43.7 56.3 23.3 Unit C/W C/W C/W C/W C/W
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
POWER SEQUENCING
The op amp supply voltages must be established simultaneously with, or before, any input signals are applied. If this is not possible, the input current must be limited to 10 mA.
ESD CAUTION
Rev. 0 | Page 5 of 16
ADA4000-1/ADA4000-2/ADA4000-4 TYPICAL PERFORMANCE CHARACTERISTICS
50 45 40 VS = 15V TA = 25C VCM = 0V
50 45 40
NUMBER OF AMPLIFIERS
VS = 5V TA = 25C VCM = 0V
NUMBER OF AMPLIFIERS
35 30 25 20 15 10 5
05791-003
35 30 25 20 15 10 5
-1.5
-1.0
-0.5 0 0.5 OFFSET VOLTAGE (mV)
1.0
1.5
2.0
-1.5
-1.0
-0.5 0 0.5 OFFSET VOLTAGE (mV)
1.0
1.5
2.0
Figure 7. Input Offset Voltage Distribution, VS = 15 V
18 16 14 VS = 15V 12 14
Figure 10. Input Offset Voltage Distribution, VS = 5 V
VS = 5V
NUMBER OF AMPLIFIERS
NUMBER OF AMPLIFIERS
10 8 6 4 2 0
12 10 8 6 4 2
05791-004
0
2
4
6
8 10 12 TCVOS (V/C)
14
16
18
20
0
2
4
6
8 10 12 TCVOS (V/C)
14
16
18
20
Figure 8. Offset Voltage Drift Distribution, VS = 15 V
80 180
80
Figure 11. Offset Voltage Drift Distribution, VS = 5 V
180
VS = 15V TA = 25C CL = 35pF
VS = 5V TA = 25C CL = 35pF
60
135
60
135
PHASE MARGIN (Degrees)
GAIN (dB)
20 60 0
45
GAIN (dB)
40
90
40
90
20 55
45
0
0
0
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 9. Open-Loop Gain and Phase Margin vs. Frequency, VS = 15 V
Figure 12. Open-Loop Gain and Phase Margin vs. Temperature, VS = 5 V
Rev. 0 | Page 6 of 16
05791-020
10k
100k
1M
10M
05791-010
-20 1k
-45 100M
-20 1k
-45 100M
PHASE MARGIN (Degrees)
05791-019
0
05791-018
0 -2.0
0 -2.0
ADA4000-1/ADA4000-2/ADA4000-4
120 VS = 15V TA = 25C 100 VS = 5V TA = 25C
100 80
CMRR (dB)
CMRR (dB)
05791-013
80
60
60
40 40
1k
10k
100k
1M
10M
10k
100k FREQUENCY (Hz)
1M
10M
FREQUENCY (Hz)
Figure 13. Common-Mode Rejection Ratio vs. Frequency, VS = 15 V
15
Figure 16. Common-Mode Rejection Ratio vs. Frequency, VS = 5 V
4 3 2
VOLTAGE (V)
10
VS = 15V AV = +1 RL = 2k TA = 25C
5
VOLTAGE (V)
1 0 -1 -2
0
VS = 5V AV = -1 RL = 2k TA = 25C
-5
-10
05791-015
-3 -4
05791-023
-15 TIME (1s/DIV)
TIME (1s/DIV)
Figure 14. Large Signal Transient Response, VS = 15 V
Figure 17. Large Signal Transient Response, VS = 5 V
VS = 15V CL = 300pF AV = +1 TA = 25C
VS = 5V CL = 300pF AV = +1 TA = 25C
VOLTAGE (20mV/DIV)
VOLTAGE (20mV/DIV)
05791-016
TIME (2s/DIV)
TIME (2s/DIV)
Figure 15. Small Signal Transient Response, VS = 15 V
Figure 18. Small Signal Transient Response, VS = 5 V
Rev. 0 | Page 7 of 16
05791-024
05791-021
20 100
20 1k
ADA4000-1/ADA4000-2/ADA4000-4
3.5 TA = 25C
1.40 TA = 25C NO LOAD 1.35
SUPPLY CURRENT (mA)
3.0
INPUT BIAS CURRENT (pA)
1.30
2.5
1.25
2.0
1.20
1.5
1.15
6
7
8
9
10
11
12
13
14
15
05791-006
5
6
7
8
9
10
11
12
13
14
15
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 19. Input Bias Current vs. Supply Voltage
10000
Figure 22. Supply Current vs. Supply Voltage
16 14 |VOL| VS = 15V VOH
1000
INPUT BIAS CURRENT (pA)
OUTPUT VOLTAGE (V)
12 10 8 6 4 2
100
10 VS = 15V 1 VS = 5V
|VOL| VOH
VS = 5V
05791-005
-25
-10
5
20
35
50
65
80
95
110
125
0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0
TEMPERATURE (C)
LOAD CURRENT (mA)
Figure 20. Input Bias Current vs. Temperature
1.44
120 100
Figure 23. Output Voltage vs. Load Current
VS = 5V, 15V
1.40
SUPPLY CURRENT (mA)
1.36
VS = 15V
80
PSRR-
PSRR (dB)
60 PSRR+ 40 20 0 -20 100
1.32
1.28 VS = 5V 1.24
05791-012
-25
-10
5
20
35
50
65
80
95
110
125
1k
10k
100k
1M
10M
TEMPERATURE (C)
FREQUENCY (Hz)
Figure 21. Supply Current vs. Temperature
Figure 24. PSRR vs. Frequency
Rev. 0 | Page 8 of 16
05791-014
1.20 -40
05791-009
0.1 -40
0
05791-008
1.0 5
1.10 4
ADA4000-1/ADA4000-2/ADA4000-4
100 VS = 5V, 15V TA = 25C 0.6 VS = 5V, 15V 0.4
VOLTAGE NOISE DENSITY (nV/Hz)
0.2
10
V p-p (V)
05791-026
0
-0.2
-0.4
1
10
100 FREQUENCY (Hz)
1k
10k
-4
-3
-2
-1
0
1
2
3
4
5
TIME (Seconds)
Figure 25. Voltage Noise Density vs. Frequency
120 VS = 15V TA = 25C
50
Figure 28. 0.1 Hz to 10 Hz Input Voltage Noise
VS = 5V, 15V
AV = +100 40
100
CLOSED-LOOP GAIN (dB)
30 20 10 0 -10 -20 -30 100 AV = +1 AV = +10
80
ZOUT ()
60
40 Av = +100 20 Av = +10 0 1k 10k 100k Av = +1
05791-017
1M
10M
100M
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 26. Output Impedance vs. Frequency
60 VIN = 100mV p-p VS = 5V, 15V RL = 0 AV = +1
Figure 29. Closed-Loop Gain vs. Frequency
50
OVERSHOOT (%)
40 +OVERSHOOT 30 -OVERSHOOT 20
10
0
200
400
600
800
1000
LOAD CAPACITANCE (pF)
Figure 27. Overshoot vs. Load Capacitance
05791-022
0
Rev. 0 | Page 9 of 16
05791-011
05791-025
1
-0.6 -5
ADA4000-1/ADA4000-2/ADA4000-4 APPLICATIONS
OUTPUT PHASE REVERSAL AND INPUT NOISE
Phase reversal is a change of polarity in the transfer function of the amplifier. This can occur when the voltage applied at the input of the amplifier exceeds the maximum common-mode voltage. Phase reversal happens when the part is configured in the gain of 1. Most JFET amplifiers invert the phase of the input signal if the input exceeds the common-mode input. Phase reversal is a temporary behavior of the ADA4000-x family. Each part returns to normal operation by bringing back the commonmode voltage. The cause of this effect is saturation of the input stage, which leads to the forward-biasing of a drain-gate diode. In noninverting applications, a simple fix for this is to insert a series resistor between the input signal and the noninverting terminal of the amplifier. The value of the resistor depends on the application, because adding a resistor adds to the total input noise of the amplifier. The total noise density of the circuit is The advantage of this compensation method is that the swing at the output is not reduced because RS is out of the feedback network, and the gain accuracy does not change. Depending on the capacitive loading of the circuit, the values of RS and CS change, and the optimum value can be determined empirically. In Figure 31, the oscilloscope image shows the output of the ADA4000-x family in response to a 400 mV pulse. The circuit is configured in the unity gain configuration with 500 pF in parallel with 10 k of load capacitive.
INPUT SIGNAL
VOLTAGE (200mV/DIV)
OUTPUT SIGNAL
e nTOTAL = e n + (i n R S ) + 4kTR S
2 2
05791-032
05791-033
where: en is the input voltage noise density of the part. in is the input current noise density of the part. RS is the source resistance at the noninverting terminal. k is Boltzmann's constant (1.38 x 10-23 J/K). T is the ambient temperature in Kelvin (T = 273 + C). In general, it is good practice to limit the input current to less than 5 mA to avoid driving a great deal of current into the amplifier inputs.
TIME (1s/DIV)
Figure 31. Capacitive Load Drive Without Snubber Network
When the snubber circuit is used, the overshoot is reduced from 30% to 6% with the same load capacitance. Ringing is virtually eliminated, as shown in Figure 32. In this circuit, RS is 41 and CS is 10 nF.
The ADA4000-1/ADA4000-2/ADA4000-4 are stable at all gains in both inverting and noninverting configurations. The parts are capable of driving up to 1000 pF of capacitive loads without oscillations in unity gain configurations. However, as with most amplifiers, driving larger capacitive loads in a unity gain configuration can cause excessive overshoot and ringing. A simple solution to this problem is to use a snubber network (see Figure 30).
+15V 3 V1 400mV p-p 0 2 V+ U1 SNUBBER NETWORK 1 RS CS CL 500pF RL 10k
05791-031
VOLTAGE (200mV/DIV)
CAPACITIVE LOAD DRIVE
INPUT SIGNAL
OUTPUT SIGNAL
TIME (1s/DIV)
Figure 32. Capacitive Load with Snubber Network
ADA4000-1
V-
-15V
0
Figure 30. Snubber Network Configuration
Rev. 0 | Page 10 of 16
ADA4000-1/ADA4000-2/ADA4000-4
SETTLING TIME
Settling time is the amount of time it takes the amplifier output to reach and remain within a percentage of its final value. This is an important parameter in data acquisition systems. Because most bipolar DAC converters have current output, an external op amp is required to convert the current to voltage. Therefore, the amplifier settling time plays a role in the total settling time of the output signal. A good approximation for the total settling time is
t S Total =
The input signal is a 10 V pulse and the output is the error signal for the settling time shown in Figure 33.
5V/DIV
(t S DAC )2 + (t S AMP )2
200mV/DIV
200ns/DIV
Figure 33. Settling Time Measurement Using the False Summing Node Method
+15V 3 V+ 0 10k V1 10V p-p -15V 10k 10k 1k 2 +15V 1 10k 8 V+
ADA4000-1
V-
AD828
V- 4 -15V 20k
VOUT
Figure 34. Settling Time Test Circuit
Rev. 0 | Page 11 of 16
05791-034
05791-035
The ADA4000-1/ADA4000-2/ADA4000-4 settle to within 0.1% of their final value in less than 1.2 s. The settling time has been tested by using the configuration circuit in Figure 34.
ADA4000-1/ADA4000-2/ADA4000-4 OUTLINE DIMENSIONS
5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497)
8 1 5 4
6.20 (0.2441) 5.80 (0.2284)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) 0.25 (0.0099) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157)
45
0.51 (0.0201) 0.31 (0.0122)
COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 35. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches)
2.90 BSC
5
4
1.60 BSC
1 2 3
2.80 BSC
PIN 1 0.95 BSC *0.90 0.87 0.84 1.90 BSC
*1.00 MAX
0.20 0.08 8 4 0 0.60 0.45 0.30
0.10 MAX
0.50 0.30
SEATING PLANE
*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 36. 5-Lead Thin Small Outline Transistor Package [TSOT] (UJ-5) Dimensions shown in millimeters
Rev. 0 | Page 12 of 16
012407-A
ADA4000-1/ADA4000-2/ADA4000-4
3.20 3.00 2.80
3.20 3.00 2.80 PIN 1
8
5
1
5.15 4.90 4.65
4
0.65 BSC 0.95 0.85 0.75 0.15 0.00 0.38 0.22 SEATING PLANE 1.10 MAX 8 0 0.80 0.60 0.40
0.23 0.08
COPLANARITY 0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 37. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
5.10 5.00 4.90
14
8
4.50 4.40 4.30
1 7
6.40 BSC
PIN 1 1.05 1.00 0.80 0.65 BSC 1.20 MAX 0.15 0.05 0.30 0.19
0.20 0.09
SEATING COPLANARITY PLANE 0.10
8 0
0.75 0.60 0.45
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 38. 14-Lead Standard Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters
8.75 (0.3445) 8.55 (0.3366)
14 1 8 7
4.00 (0.1575) 3.80 (0.1496)
6.20 (0.2441) 5.80 (0.2283)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122)
1.75 (0.0689) 1.35 (0.0531) SEATING PLANE
0.50 (0.0197) 0.25 (0.0098) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157)
45
COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 39. 14-Lead Standard Small Outline Package [SOIC_N] (R-14) Dimensions shown in millimeters
Rev. 0 | Page 13 of 16
060606-A
ADA4000-1/ADA4000-2/ADA4000-4
ORDERING GUIDE
Model ADA4000-1ARZ 1 ADA4000-1ARZ-R71 ADA4000-1ARZ-RL1 ADA4000-1AUJZ-R21 ADA4000-1AUJZ-R71 ADA4000-1AUJZ-RL1 ADA4000-2ARZ1 ADA4000-2ARZ-R71 ADA4000-2ARZ-RL1 ADA4000-2ARMZ-R21 ADA4000-2ARMZ-RL1 ADA4000-4ARZ1 ADA4000-4ARZ-R71 ADA4000-4ARZ-RL1 ADA4000-4ARUZ1 ADA4000-4ARUZ-RL1
1
Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Package Description 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead TSSOP 14-Lead TSSOP
Package Option R-8 R-8 R-8 UJ-5 UJ-5 UJ-5 R-8 R-8 R-8 RM-8 RM-8 R-14 R-14 R-14 RU-14 RU-14
Branding
A14 A14 A14
A1H A1H
Z = RoHS Compliant Part.
Rev. 0 | Page 14 of 16
ADA4000-1/ADA4000-2/ADA4000-4 NOTES
Rev. 0 | Page 15 of 16
ADA4000-1/ADA4000-2/ADA4000-4 NOTES
(c)2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05791-0-5/07(0)
Rev. 0 | Page 16 of 16


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